Alfa Rpar - K1100CK2 - Monolithic Sample-and-Hold Circuits

Product information "Alfa Rpar - K1100CK2 - Monolithic Sample-and-Hold Circuits"
The 1100CК2, К1100СК2, КР1100СК2 are monolithic sample-and-hold (SHA) circuits, controlled by signal LOGIC, stores the instantaneous values of the input signal and for a certain time maintain a constant DC voltage at the output with a high accuracy.
The wide bandwidth allows the 1100CК2 to be included inside the feedback loop of 1 MHz op amps without having stability problems. Input impedance of 10^10 Ω allows high source impedances to be used without degrading accuracy.
The overall design ensures no feedthrough from input to output in the hold mode, even for input signals equal to the supply voltages. Logic inputs on the 1100К2 are fully differential with low input current, allowing for direct connection to TTL, PMOS, and CMOS. Differential threshold is 1.4 V. The 1100CК2 will operate from ±5V to ±15V supplies.
The 1100CК2 OUTPUT tracks the INPUT signal by charging and discharging the hold capacitor (CH). The OUTPUT can be held at any given time by pulling the LOGIC input low relative to the LOGIC REFERENCE voltage and resume sampling when LOGIC returns high. Additionally, the OFFSET pin can be used to zero the offset voltage present at the INPUT.
The 1100CK2 and K(KP)1100CK2 devices have a sample mode and hold mode controlled by the LOGIC voltage relative to the LOGIC REFERENCE voltage. The device is in sample mode when the LOGIC input is pulled high relative to the LOGIC REFERENCE voltage and in hold mode when the LOGIC input is pulled low relative to the LOGIC REFERENCE. In sample mode, the output is tracking the input signal by charging and discharging the hold capacitor. Smaller values of hold capacitance will allow the output to track faster signals. In hold mode the input signal is disconnected from the signal path and the output retains the value on the hold capacitor.
The nominal value of the supply voltage UСС1,2=±15V for 1100СК2B и UСС1,2=±12V for 1100СК2А, К1100СК2, КР1100СК2.
1100CK2, К1100СК2 are released in TO5-8, KP1100CK2 in PDIP-8(300Mil).

• Supply voltages ±15V (group B), ±12В (group А)
• Less than 7 μs sampling time with an error of 0.1% at CH = 1000 pF
• Less than 180 ns aperture delay
• Range of input voltages ± 10V (group B), ± 5V (group B)
• External hold capacitor
• Output short-circuit protection
• Compatibility with control input with TTL / CMOS logic

• Ramp generators with variable reset level
• Integrators with programmable reset level
• Synchronous correlators
• 2-Channel switches
• DC and AC zeroing
• Staircase generators
Basic Function: S&H
IC Package: TO5-8 (THT)
Pin Count: 8
Pin Pitch [mm]: 1,94
Technology: THT

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